This invention relates to the field of communications for transmitting symbols and more specifically to the demodulation of signals utilizing phase shift keying. These include: Standard Phase Shift Keying (PSK) also referred to as Binary PSK (BPSK), Differential PSK (DPSK), Quadrature PSK (QPSK), or other M-ary PSK methods, but will be referred to generally as PSK herein.
The demodulation of PSK signals typically requires complex analog circuitry, and/or the use of a high-end processor such as a digital signal processor (DSP) with high speed analog to digital converters, or by providing a separate xe2x80x98clockxe2x80x99 channel to aid in the demodulation of the PSK data. The current state of the art demonstrates the complexity of current solutions to this problem. These solutions are lacking, in that they have one or more of the following negative aspects: high cost, high power requirements, high clock frequencies that generate excessive EMI, significant printed circuit board real estate, require implementation in a custom integrated circuit or some form of programmable logic due to complexity, are sensitive due to the use of a significant number of analog components, or require two complete transmit and receive channels. For applications sensitive to these issues, none of these solutions are acceptable.
Solutions to the problem of PSK demodulation in the prior art have a common inferred assumption, which can be stated as follows: The carrier signal used in the transmitter, and the reference signal generated in the receiver that is used in the demodulation process, can deviate widely from each other in terms of frequency. Therefore the demodulator must incorporate a means to characterize, and a method of compensation to aid in the correction of this wide deviation in frequency. In fact, there exists a large subset of systems in which this frequency disparity is actually very narrow. Prior art goes to great lengths to compensate for this frequency deviation by implementing phase locked loop (PLL) circuitry or through the use of high power DSP chips or complex digital logic. Instead of providing a solution for the most general case of PSK demodulation, this invention solves the PSK demodulation problem of the more typical case, which allows a significant reduction of the design requirements of the system, when coupled with the appropriate methods. By taking into account the existing functionality available in a typical PSK transmitter/receiver design, the system, when taken as a whole, can be greatly simplified.
Many PSK data systems contain crystal oscillators in both the transmitter and the receiver and typically contain an inexpensive microcontroller with embedded peripherals in the receiver, if not both the transmitter and the receiver (For example a pen transmitter and a tablet receiver in a digitizer system wherein pen position on a tablet surface is detected and the position coordinates are digitized). The existence of the crystal oscillators in both the transmitter and receiver, and the presence of an inexpensive microcontroller in the receiver can be exploited to reduce the complexity and cost of the system with a minimum of external hardware requirements. By requiring the transmitter and receiver to use crystal-controlled clocks, a complete PSK demodulator can be formed using the existing low cost microcontroller in the receiver when coupled with the methods of the invention and the integrated peripherals contained in the microcontroller. This results in an extremely low cost and low power solution utilizing a minimum of components. Thus, this invention applies to the demodulation of PSK signals, of various types, in systems that have a carrier frequency in the transmitter that is derived from a crystal controlled clock, and a receiver, which performs the PSK demodulation, that contains a microcontroller or other means to execute a method, which is clocked by a signal derived from a crystal controlled clock.
The following is a brief description of various implementations of prior art.
Analog PLL Demodulator
There are numerous patents relating to PSK data recovery using a phase locked loop (PLL). This has been a standard method for detection of PSK modulated signals and has been used for decades. Most of the patents in this area address various problems with PLL designs (i.e., false locking, expanding capture range, reducing capture time, etc). After reviewing numerous patents in this area, it can be inferred that a PLL solution is overly complex, and fraught with problems due to its highly analog nature. For this reason, the use of an analog PLL in this invention has been avoided.
Digital Signal Processing
These solutions fall into two categories; discrete digital circuitry, which would typically be implemented using a custom integrated circuit or programmable logic chip due to their complexity, and the more general DSP chip solution. The majority of the digital implementations utilize a quadrature mixer fed by a sine and cosine generator, or a quadrature-sampling configuration to recover the PSK modulated signal. They also require high-speed analog to digital converters, which provide A-to-D samples at a multiple of the transmitter carrier frequency, and are placed at various points in the design. These solutions all prove to be inadequate for one or more of the following reasons: excessive cost, power, clock rates or real estate requirements. This invention requires minimal external circuitry, utilizes a low cost low power microcontroller that is typically already part of the system, using low bandwidth A-to-D conversions with samples taken at the much lower symbol rate, and does not require a large gate count custom IC. Systems that include a DSP chip in place of a microcontroller can also be used to implement this invention at a much lower cost than the DSP solution in the prior art.
Second xe2x80x98Clockxe2x80x99 Channel
A third solution is that of adding an additional channel to the system to provide a synchronized clock signal. This greatly simplifies the PSK demodulation step, but ads complexity to the system by requiring another transmit and receive chain and associated hardware. Implementing this second channel in wireless systems has many drawbacks, as anyone working in the field is well aware. This invention requires only a single channel for proper operation.
Differential PSK
Several other implementations of prior art reduce the complexity of the demodulator by requiring the use of Differential PSK (DPSK). When using DPSK, the phase of the current symbol is measured and compared to the phase of the previous symbol. This simplifies the demodulation task somewhat, but eliminates the possibility of working with other PSK methods. This invention does not require the use of DPSK for its proper operation, but is compatible with DPSK as well as other PSK modulation techniques.
Briefly, the present invention is a method for demodulating a PSK modulated signal wherein the PSK system incorporates a transmitter generating a PSK modulated signal and wherein the transmitter is crystal based. A crystal based receiver receives the PSK modulated signal and the delta phase between the recovered PSK signal and a receiver generated reference signal is measured; the measurement is repeated after a predetermined phase delay. Voltage values are derived representing the results of each of the measurements and are used to adjust the phase of the reference signal.